Sick of your smartphone losing battery after just half a day? IBM and its partners might have the answer in new 5-nanometer chip processors. While the latest 10-nanometer processors are already appearing in common electronic devices, the big names just stepped it up a notch. The leaders in the field are already imagining a more powerful chip: a 5-nanometer processor that will contain up to 30 billion transistors.
[Image Source: Connie Zhou/IBM]
A new process has been developed that could produce 5-nanometer chips using silicon nanosheet transistors. The technology is the brainchild of researchers at IBM, GlobalFoundries, Samsung, and the SUNY Polytechnic Institute Colleges of Nanoscale Science and Engineering. The tiny invention has the potential to speed up cognitive computing and would have Internet of Things and cloud data processing applications too.
Preparing test wafers with 5nm silicon nanosheet transistors [Image Source: Connie Zhou/IBM]
Further details about the exciting discoveries will be presented at the 2017 Symposia on VLSI Technology and Circuits that started in Kyoto yesterday. The 5-nanometer processors could double the life of a smartphone battery.
As small as DNA strands
Currently, nanometer processing production employs a process called FinFET (fin field effect transistor) that uses thin, vertical silicon “fins” to increase electrical control in transistors. This technology is being used to produce the most powerful 10-nanometer chips for electronic devices that we see available today. The key to the technology is minimizing performance-versus-power tradeoffs present in processor manufacturing.
In contrast, the new smaller and more powerful processors by IBM and its research team will be developed using a new process of layering silicon nanosheets in horizontal banks. This method gives an opportunity for a fourth horizontal entry for transmitting signals on a transistor.
Silicon nanosheet transistors at 5nm [Image Source: IBM]
Huiming Bu, IBM’s director of silicon integration and device research describes just how small the transistors are: “At these dimensions, it means that those signals are passing through a switch that’s no larger than the width of two to three DNA strands, side-by-side”. He goes on further to explain in the blog post, “More ways to send a signal on more 5nm transistors equates to a 40 percent performance improvement over 10nm chips, using the same amount of power; or a 75 percent power savings, at the same performance level.”
The success of the FinFET technology is evident in creating 10-nanometer chips for electronic devices, as you can ‘see’ it in action in the popular Galaxy S8 smartphone. For the technology to move towards 5nm chips the manufacturing process needs to be rethought as it would not provide the performance and power gains necessary.
Now the race is on for refining the horizontal stacking process the fastest. Bu makes this exciting note in his blog post: “With regard to the manufacturing date of 5-nanometer technology, I’d say it would happen in the next few years,”. He went on further to say in a video for IBM about the new chip producing processes, “This is really good news for everyone in semiconductors or the whole society, whether you’re programming the next apps or you’re simply excited about the next devices which can take advantage of this technology.”
IBM has already had some success in producing a 7-nanometer chip using a number of new processes and techniques which they will commercially release in electronic devices by 2018.