Researchers modified regular microwaves to shrink electronics further

The baking of microchips and transistors

For a chip or transistor to produce the desired electric current, material ingredients such as silicon and phosphorus need to be mixed in fixed amounts and then heated, much like baking a cake. The process of heating positions phosphorus atoms in the correct way where they conduct electricity. This is also called annealing, and the devices used to carry out the process are called annealers.

As microchips shrink in size, the concentration of phosphorus required to produce the desired current has increased significantly. "We need concentrations of phosphorus that are higher than its equilibrium solubility in silicon. That goes against nature,” said James Hwang, who led the research team at Cornell. “The silicon crystal expands, causing immense strain and making it potentially useless for electronics.”

For semiconductor manufacturers, this would be a critical point beyond which they would no longer be able to shrink the electronics.

Microwaves to the rescue

The Taiwan Semiconductor Manufacturing Company (TSMC), the world's first dedicated semiconductor foundry and the leading semiconductor manufacturing, had theorized that microwaves could be used to activate excess dopants like phosphorus.

When they attempted this in the lab, TSMC found that microwaves heated the dopants unevenly, just like it heats food unevenly. This inhibits consistent activation of the dopant, which was then attributed to the "standing waves" produced by microwave annealers. Standing waves are waves that have the same amplitude and frequency but are moving in opposite directions.

TSMC then teamed up with Hwang at Cornell, who modified the microwave oven to selectively control where the standing waves occur. The modified microwave annealer now allowed precise activation of the dopants without damaging the silicon crystal.

“A few manufacturers are currently producing semiconductor materials that are 3 nanometers. This new microwave approach can potentially enable leading manufacturers such as TSMC and Samsung to scale down to just 2 nanometers,” Hwang added in the press release.

The breakthrough could also help change the architecture that has been deployed by the semiconductor industry for over two decades. Instead of placing transistors like dorsal fins, manufacturers can now begin stacking them horizontally as nanosheets and further increase their density and control.

Devices using this technology could be available as early as 2025.

The research findings were published in the journal Applied Physics Letters.

Abstract

The relentless scaling of semiconductor devices pushes the doping level far above the equilibrium solubility, yet the doped material must be sufficiently stable for subsequent device fabrication and operation. For example, in epitaxial silicon doped above the solubility of phosphorus, most phosphorus dopants are compensated by vacancies, and some of the phosphorus-vacancy clusters can become mobile around 700 °C to further cluster with isolated phosphorus ions. For efficient and stable doping, we use microwave annealing to selectively activate metastable phosphorus-vacancy clusters by interacting with their dipole moments, while keeping lattice heating below 700 °C. In a 30-nm-thick Si nanosheet doped with 3 × 1021 cm−3 phosphorus, a microwave power of 12 kW at 2.45 GHz for 6 min resulted in a free-electron concentration of 4 × 1020 cm−3 and a junction more abrupt than 4 decades/nm. The doping profile is stable with less than 4% variation upon thermal annealing around 700 °C for 5 min. Thus, microwave annealing can result in not only efficient activation and abrupt profile in epitaxial silicon but also thermal stability. In comparison, conventional rapid thermal annealing can generate a junction as abrupt as microwave annealing but 25% higher sheet resistance and six times higher instability at 700 °C.